The present invention relates to a reticle for forming a miniaturized pattern in a lithographic step during the process of manufacturing of a semiconductor integrated circuit and to a method of forming the pattern.
In recent years, design rules for semiconductor integrated circuits have been reduced continually to reach a point where semiconductor integrated circuits with 0.25 .mu.m minimum features are appearing on the market. With the increasing miniaturization of pattern geometry, a G-line used conventionally as exposing light in the lithographic step has been replaced in succession by an I-line and by a KrF excimer laser or an ArF excimer laser.
While the development of an aligner using the ArF excimer laser for lithography has been delayed by the problem of laser absorption by a material composing the lens or the like, various ultra-high resolving technologies using the KrF excimer laser have been studied for practical application. Among these, the technology using an alternating phase-shifting mask promises the highest resolution. The alternating phase-shifting mask has a first aperture for transmitting regular-phase light and a second aperture for transmitting reversed-phase light, which are formed adjacent to each other with a mask portion interposed therebetween. Since the intensity of regular-phase light and the intensity of reversed-phase light cancel each other out at the mask portion, a contrast ratio is achieved between the first aperture or second aperture and the mask portion. The alternating phase-shifting mask is therefore used in combination with a negative resist to form an island pattern (isolated pattern) such as a wiring pattern.
However, the negative resist presents the intrinsic problem that a resist pattern formed thereof has inwardly tapered edge profiles (the size of a portion under measurement is different from the size of a portion directly involved in etching in the resist pattern having inwardly tapered edge profiles). When used in combination with a phase-shifting mask, the negative resist also presents the problem associated with pattern placement that the first aperture for transmitting regular-phase light and the second aperture for transmitting reversed-phase light should be formed adjacent to each other.
By contrast, a positive resist is commonly used in a lithographic step of the contemporary semiconductor process since a resist pattern formed of the positive resist has vertical or outwardly tapered edge profiles and therefore is free of the problem that the size of the portion under measurement is different from the size of the portion directly involved in etching.
Accordingly, if the alternating phase-shifting mask and the positive resist are used in combination to form a resist pattern, the problem resulting from the inwardly tapered edge profiles does not occur any more and a positive resist in common use can be used advantageously without any modification, so that excellently high resolution is achieved.
However, the combination of the alternating phase-shifting mask with the positive resist presents the problem that the light transmission portion is formed in an island pattern, which results in an indiscrete, bridged resist pattern. Hence, a miniaturized island pattern cannot be formed by using the alternating phase-shifting mask and the positive resist in combination.
Under such circumstances, Japanese Laid-Open Patent Publication HEI 8-51068 has disclosed a method of forming a miniaturized island pattern by using two reticles consisting of an alternating phase-shifting mask and a normal chrome reticle. The conventional pattern formation method disclosed in Japanese Laid-Open Patent Publication HEI 8-51068 will be described with reference to FIG. 9, FIGS. 10(a) and 10(b), and FIGS. 11(a) and 11(b).
FIG. 9 is a flow chart in accordance with the conventional pattern formation method. First, a wafer is coated with a positive resist forming a resist film.
Next, an aligner is loaded with a phase-shifting mask 101 having first and second apertures 101a and 101b and mask portions 101c as shown in FIG. 10(a), which is then subjected to a first reticle alignment. The first apertures 101a transmit light opposite in phase to light transmitted by the second apertures 101b. Namely, the light transmitted by the first apertures 101a and the light transmitted by the second apertures 101b have a 180.degree. phase difference therebetween. Subsequently, a first wafer alignment is performed with respect to the wafer, which is then subjected to a first exposure. As a result, a miniaturized pattern in closed-loop configuration corresponding to the configuration of the mask portions 101c located between the first and second apertures 101a and 101b and having a line width less than the wavelength of exposing light is transferred onto the wafer.
Next, an aligner is loaded with a chrome reticle 102 having an aperture 102a and a mask portion 102b as shown in FIG. 10(b), which is then subjected to a second reticle alignment. Subsequently, a second wafer alignment is performed with respect to the wafer, which is then subjected to a second exposure.
The sequence of reticle alignments may be changed in order by successively performing the first alignment with respect to the chrome reticle 102 having the aperture pattern shown in FIG. 10(b) and the second alignment with respect to the phase-shifting mask 101 having the aperture pattern shown in FIG. 10(a).
As a result, regions where the mask portions 10c of the phase-shifting mask 101 and the mask portion 102b of the chrome reticle 102 overlap (hatched regions in FIG. 11(a)) constitute positive pattern regions 103, so that an island resist pattern 105 composed of the resist film as shown in FIG. 11(b) is formed on the wafer 104.
In accordance with the conventional pattern formation method, however, the total of two reticle alignments should be performed with respect to two reticles consisting of the phase-shifting mask 101 and the chrome reticle 102, while two wafer alignments should be performed accordingly with respect to the single wafer 104.
Since each of reticle loading, reticle alignment, wafer loading, and wafer alignment should be performed twice, considerable time and labor is required. In short, it is necessary to achieve throughput approximately double the throughput achieved by the normal pattern formation method.
In addition, the problem of reproducibility of pattern alignment occurs in performing the two reticle alignments and the two wafer alignments. Rotation reproducibility is particularly low in the reticle alignment so that the accuracy with which a pattern formed by the first exposure and a pattern formed by the second exposure are aligned relative to each other is reduced significantly. In the case where the pattern has an intricate configuration or undulations, allowance should be made for the reduction in alignment accuracy in setting layout rules so that the area occupied by chips formed on the wafer is increased disadvantageously.